CLIOSOFT EVENT RESOURCES
Cliosoft resources at your fingertips.
Product Brochures
Product Integration Brochures
Videos
IP Based Digital Design Management That Goes Beyond The Basics
Learn why common design management capabilities are not enough and what next generation capabilities are needed for IP based digital design management.
Improve BOM Management & IP Traceability
Learn how to improve Bill-of-Materials (BOM) Management while increasing IP Traceability & document tracking for better design project execution.
Designing on AWS
See examples & best-practice architectures for cloud-based EDA, including use-cases inside and outside of Amazon as AI and IoT, in the cloud & at the edge, driving a need for rapid innovation in semiconductor devices.
The New Trend In IP Traceability That IP Developers and Design Managers Rely On
Learn how to get IP traceability right from IP release to handoff & propagate those changes to the rest of the team.
Network Storage Optimization for IP
Prathna Sekar, technical account manager at ClioSoft, explains how to manage large quantities of data & how to reduce storage needed for data.
Challenges in IP reuse
Jeff Markham, software architect at ClioSoft, explains why IP reuse is so important in advanced process node SoC chip designs and what companies need to keep track of when working with third-party IP.
Visualizing Differences in Analog Design
Prathna Sekar, technical account manager at ClioSoft, explains the challenges of managing analog versus digital IP and why visualization is important to analog designs.
What's In Your IP
Jeff Markham, software architect at ClioSoft, explains what’s actually in IP, what should not be in that IP from a security standpoint, and how all of this data can used to avert system reliability issues in the future.
eBooks
eBook Best Practices for Deploying Cliosoft SOS on Amazon Web Services (AWS)
How designers can leverage design management in the cloud AWS.
eBook Using Cliosoft SOS Design Management Platform In The Cloud
How designers can leverage design management in the cloud to successfully tapeout SoCs.
eBook Startup Best Practices
Best practices and methodology to lay the foundation for a design team that is built to last.
eBook Mixed-Signal Methodology Guide Ch.11: Data Management (English)
Chapter 11: Data Management for Mixed-Signal Designs from Cadence's Mixed-Signal Methodology Guide on SoC design management.
eBook Mixed-Signal Methodology Guide Ch.11: Data Management (Chinese)
Chapter 11: Data Management for Mixed-Signal Designs from Cadence's Mixed-Signal Methodology Guide on SoC design management.
Cliosoft Blog
How Gamification Improves Semiconductor Intellectual Property Reuse
This article will discuss how crowdsourcing and gamification can improve semiconductor IP reuse and provide examples of how companies have successfully implemented these strategies.
Managing IP in Heterogeneous Designs
Pedro Pires, applications engineer at Cliosoft, talks about the implications of IP reuse in a complex, multi-IP context, including how different standards and database formats can affect IP tracking, traceability, and much more.
Improving Design Collaboration in the Age of Remote Work
Teams of Analog and Mixed Signal (AMS) Design and Layout engineers spend countless hours extracting every ounce of performance out of their design.
Design-Aware Data Management for Hybrid Cloud
Working from home has become a standard operating practice for the semiconductor design industry.
Chip Design Teams and Restaurant Kitchen Staff Have a Lot in Common
How to make it easier to locate the IP a team wants to re-use.
Cliosoft Selected for Rapid Assured Microelectronics Prototypes (RAMP) Program
Cliosoft announces collaboration with Microsoft to help bring commercial innovations in chip design to national security.
Maximize the Value of Your 3rd Party IP Investment
How organizations maximize the value and life cycle of IP assets they have licensed or developed in-house.
Keep EDA Cloud Deployment Simple
Challenges of using the cloud for IC design.
3 Ways To Improve Design Collaboration: Part 3
Creating an automated flow to manage how designs are passed between schematics and layout engineers.
The History and Physics of Cliosoft’s Academic Program
A brief history of how Cliosoft’s academic program came to be and it’s strong ties to physics.
3 Ways to Improve Design Collaboration – Part 2
Keeping track of changes made during the ECO phase to avoid miscommunication and avoid unnecessary modifications.
Visual Design Diff
How to easily identify and visualize differences in schematics and layouts for IC design.