Reusing Your IPs & PDKs Successfully With Cadence® Virtuoso®


When: Wednesday, November 14th, 2018 at 10.30 am PST / 6.30 pm GMT / 7.30 pm CET
Duration: 30 minutes

Are you facing a challenge, managing and reusing analog IPs, PDKs for the Cadence Virtuoso environment? Do you face issues with the quality of the IPs you select and download for your SoC? Do you constantly need to modify the PDKs you develop and want to track the open issues for the different releases of the PDK available for download? Do you want to have better controllability on the IPs, PDKs developed by you and track their usage throughout your company?

Join the designHUB webinar to see how you can browse for IPs for a specific PDK within your company directly from the Virtuoso cockpit, compare and quickly qualify them, interact with IP developers to have any queries answered before making the final IP selection. See how you can use designHUB to explore the experiences and success design teams have had in using the IP and review the collateral such as documents, verification suites etc. available for the IP prior to downloading it into your workspace. And once you have completed your development, securely publish either your IP or PDKs easily directly from the Virtuoso cockpit into either designHUB or any data management platform.

The designHUB platform works with all data management software such as SOS7, Perforce, Subversion, designSync and Git.

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About ClioSoft Inc.

ClioSoft is the pioneer and leading developer of system-on-chip (SoC) design configuration and enterprise IP management solutions for the semiconductor industry. The company's flagship product SOS7 Design Collaboration Platform, built exclusively to meet the demanding requirements of SoC designs, empowers single or multi-site design teams to collaborate efficiently on complex analog, digital, RF and mixed-signal designs from concept to GDSII.

The designHUB platform from ClioSoft provides a collaborative IP management and a design reuse ecosystem for enterprises. With built in analytics and collaborative tools, designHUB improves design reuse by providing an easy-to-use workflow for designers to leverage internal resources and efficiently manage the process of browsing, integrating and developing new IPs or SoCs. With an easy-to-use administration and user cockpit, ClioSoft provides enterprise-level IP Management to manage the process of creating IPs and their derivatives, their lineage, IP licensing, security, issue and defect tracking.

ClioSoft customers include the top 20 semiconductor companies worldwide. ClioSoft is headquartered at 39500 Stevenson Place, Suite 110, Fremont, CA, 94539. For more information visit us at www.cliosoft.com