When: Thursday, August 30th, 2018
Time: 9am PST
Duration: 1 hour
Increased complexity in SoCs & PDKs coupled with tight schedules has ensured that designers are inundated with multiple versions of schematics and layout views. For small design teams, managing their design data efficiently is a critical component for successfully taping out. Design team managers and engineers now need quick answers to questions such as
- How to track milestones for each block of my design such as the design is finished, layout is done, it passes DRC/LVS.
- How was the design changed this week?
- The design was working yesterday. What changed? Who changed it? Why?
- What is the difference between the two versions of this layout?
Without the presence of a design data management system and a process to collaborate among designers, productivity is wasted and errors may result. Join this webinar where we showcase a non-intrusive flow for both local and remote design teams to effectively collaborate on their IPs/SoCs by using ClioSoft's SOS7 Design Management Platform integrated with Tanner's IC Design flow.
Who Should Attend
- Analog IC Designers
- Mixed-Signal IC Designers
- Design Managers
What You Will Learn
- Good design management practices
- Common Data Management tasks during design such as tracking a block's milestones such as the design is finished, layout is done, and it passes DRC/LVS
- How to track down the change that broke the designs
- Know which revision of the schematic that the layout was created for
- What is the difference between the two versions of this layout
- Working with teams in different locations
About ClioSoft Inc.
ClioSoft is the pioneer and leading developer of system-on-chip (SoC) design configuration and enterprise IP management solutions for the semiconductor industry. The company's flagship product SOS7 Design Collaboration Platform, built exclusively to meet the demanding requirements of SoC designs, empowers single or multi-site design teams to collaborate efficiently on complex analog, digital, RF and mixed-signal designs from concept to GDSII.
The designHUB platform from ClioSoft provides a collaborative IP management and a design reuse ecosystem for enterprises. With built in analytics and collaborative tools, designHUB improves design reuse by providing an easy-to-use workflow for designers to leverage internal resources and efficiently manage the process of browsing, integrating and developing new IPs or SoCs. With an easy-to-use administration and user cockpit, ClioSoft provides enterprise-level IP Management to manage the process of creating IPs and their derivatives, their lineage, IP licensing, security, issue and defect tracking.
ClioSoft customers include the top 20 semiconductor companies worldwide. ClioSoft is headquartered at 39500 Stevenson Place, Suite 110, Fremont, CA, 94539. For more information visit us at www.cliosoft.com